About Me

I am a Professor at the Department of Electrical Engineering, Technion.

Research before the Technion tenure

I completed my PhD in 2010 at the Technion Computer Science Department, under the supervision of Prof. Dan Geiger and Prof. Assaf Schuster. My thesis dealt with the problem of accelerating large-scale genetic linkage analysis. This type of analysis is used for identifying genomic locations of rare genetic disease-causing mutations.  The outcome of this work is the system called Superlink-online-SNP, which is an online tool for genetic linkage analysis that automatically parallelizes the analysis tasks and executes them on a cluster of CPUs. A key component of the system is a parallel algorithm for inference in large Bayesian networks. The networks are used to model genetic inheritance and linkage in large pedigrees. The first generation of the system used tens of thousands of computers worldwide. These included numerous machines from the University of Wisconsin in Madison and Open Science Grid in the US (thanks to the collaboration with Prof. Miron Livny), CERN grid, Amazon EC2, as well as thousands of home desktops that voluntarily joined the system.  Superlink-online as a whole managed to accelerate the processing of huge data sets by three orders of magnitude.  The current version with the same code base runs on a few dozen machines managed by HT Condor and is routinely used by geneticists all over the world. The system is described in detail in my PhD thesis.

I was among the early adopters of General Purpose GPU computing. In collaboration with John Owens, I built multi-dimensional tensor product kernels used in Bayesian networks to run on GPUs. This work was among the first to show that GPUs can bring orders-of-magnitude speedups when using software-managed caching.

I spent a year as a postdoc with Idit Keidar at the Technion, and then 2 years as a postdoc in the University of Texas at Austin, with Prof. Emmett Witchel‘s Operating Systems Architecture group. These years marked the beginning of my research in Operating Systems for GPUs. In collaboration with Chris Rossbach, we built the first set of OS abstractions that turn GPUs into first-class schedulable entities and allowed coordination among GPUs via a simple data-flow programming model. A different line of research introduced OS abstractions on GPUfs themselves, in particular,  GPUfs file system layer (together with Bryan Ford). GPUfs was the pivotal point that spun a new research direction of accelerator-centric OS architectures which has been the focus of my work after joining the Technion as a faculty member.

ACACES HiPeac Summer School 2022

I taught at the International Summer School on accelerator-centric system architecture.

The slides for the course are available here.

Cyber-security Summer School 2018

I co-organized the Technion cyber-security summer school on side channels and trusted execution environments.

The talks are available online.

SIGARCH Blog

I have been publishing a few (quite popular) blog posts on the SIGARCH Blog.

Teaching (every year)

  • Springs 046278/236278  Accelerators and Accelerated Systems
  • Springs 046280 (with Ittay Eyal) Principles and Tools for Computer Security
  • Winters 046209 Intro to OS
  • Winters 048080 Advanced OS and architecture – Trusted Execution Environments

Teaching (Past)

  • Winter 2013-20: 048961 Seminar on Advanced Topics in OS
  • Spring 2018: 048885 (with Yoav Etsion and Shahar Kvatinsiky) Hardware and Software in Post-CMOS era
  • Spring 2015: 048661 Design and implementation of Deep Learning Systems

Program committees

For the last few years, I have been organizing a workshop on the Systems for Post-Moore Architectures  co-located with EuroSys.

  • 2024: EuroSys (co-chair), SOSP, ASPLOS, Micro
  • 2023: ASPLOS, EuroSys, OSDI, ASPLOS workshop chair
  • 2022: ASPLOS, ATC, SysTEX, SPMA, MICRO
  • 2021: ATC, EuroSys, SOSP
  • 2020: ASPLOS, ATC, VEE
  • 2019: SOSP, ASPLOS, ATC, VEE, PPoPP, EuroDoctoralWorkshop (co-chair)
  • 2018: OSDI, ASPLOS, SysTEX (co-chair)
  • 2017: SOSP, Usenix Middleware
  • 2016: SYSTOR (co-chair), VEE, PACT
  • 2015: SYSTOR, EuroSys
  • 2014: SYSTOR, ASPLOS

Awards

  • 2023: Morton and Beverley Rechler Prize for Excellence in Research
  • 2022: IEEE MICRO TopPicks, IEEE MICRO TopPicks Honorable Mention
  • 2020: EuroSys Jochen Liedtke Young Researcher Award
  • 2019: IEEE MICRO TopPicks
  • 2018: First and Third prize in Cyber Security Awareness Worldwide (CSAW) Regional competition
  • 2016: Best paper  (ROSS)
  • 2014: Best paper  (SYSTOR)
  • 2013: Yahoo! ACE
  • 2013: Best Paper runner-up (ASPLOS)
  • 2011: Best Paper (SYSTOR)
  • 2010: Second prize, IEEE International Scalable Computing Challenge
  • 2009: George Michael Memorial HPC Fellowship 2009 Honorable Mention
  • 2001: IBM Alfaworks development award

Bio and Family

I was born in Novosibirsk,  Russia. I was a student in the Novosibirsk State Technical University but left a few months before graduating and immigrated (made alia) to Israel. My father is an orthopaedic surgeon specializing in spine surgery. My brother is a haematologist and a professor of medicine at the Fred Hutch Institute in Seattle.

My wife Natalia holds a PhD in Computer Science on Coding Theory, and currently is a senior data scientist in Outbrain.  She is a professional pianist, born in a family with a long history of great musicians, including her father, a violinist and conductor Mikhail Turich,  cellist Isaak Turich and world-renowned pianist Rosa Tamarkina.

She is also a “co-author” of our three most important joint “projects” …